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HPC User Site Census: Processors

by Christopher G. Willard, Ph.D., Debra Goldfarb, Addison Snell
for Intersect360 Research (originally published under the Tabor Research name)
April 2008

The second Site Census Report in our series is an examination of the processors found at a sample of HPC user sites. We surveyed a broad range of users about their systems’ suppliers, architectures, node counts, operating systems, interconnects, memory usage, processor types, and storage. The initial report, HPC User Site Census: Systems focused on server suppliers and server node characteristics.1

Our goal in its analysis was to discover processor-related trends within the HPC user communities and explore how the data varies based on categories such as server supplier, architecture, node configuration, etc.

Key findings of the survey are as follows:

  • Systems averaged about 438 processors. Interestingly, even when excluding very high node count systems, the distribution was still skewed towards the high-end, with the median processor count per system at 130. Processors per node averaged 2.2. Cores per node ranged from one to eight, with an average of 3.9.
  • Outliers excluded, the market is currently dominated by industry standard processors provided by AMD and Intel. These two companies accounted for about 84% of processors in the sample. In addition, a similar share of systems was based on standard CPUs. AMD processors appeared somewhat more often than Intel processors; however, this is a case where previous performance may be a poor indicator of future results, as HPC users will change processors brands quickly based on delivered price/performance.
  • IBM BlueGene systems dominated both node and processor statistics when considering all systems; however, we viewed these highly specialized MPPs in a category of their own (i.e. outliers), and along with a few other very high node count systems, they were excluded from most analyses.
  • The majority of processors in the non-MPP classification were found in clusters (91%), with blade systems accounting for another 7%. On a processor count basis, SMPs have virtually disappeared from the market with less than a 3% share.
  • The majority of clusters used two-processor nodes, with four-processor nodes coming in a distant second.
  • The installed base is about midway in its transition from single-core to multi-core processors with single-core CPU chips accounting for more than half of total processors. In addition, more than half of current systems are using single-core processors. This transition is driven by a combination of processor supplier product cycles, which dictate the available options to users; user technology refresh cycles, which are major determinants for technology entry rates; and new users, who typically tend to favor the latest technology. The challenge for suppliers and users will be to extract the performance from high core-count processors, and to identify the point of diminishing returns where higher numbers of cores do not lead to appreciable increases in delivered performance.
  • Examination of average memory utilization over time suggests that users may purchase memory based on the number of cores rather than the number of processors.

Tabor Research sees the following processor-related issues to be significant in terms of their market impact:

  • Customers are supplier agnostic – The market shows no distinct preference for either x86 processor supplier, with sites choosing specific CPUs based on price/performance and availability at the time of purchase. Processor suppliers may be able to lock in some customers by including tools that surround the processor. However, a large segment of the technical HPC market will continue to select processors based on “bang for the buck.” Thus, systems suppliers must be prepared to incorporate a variety of processor options into their HPC product strategies.
  • Multi-year transition to multi-core – The market is about midway in its transition from single-core to multi-core processors and should largely complete this transition within the next few years. Users and suppliers must face ongoing issues around application parallelization and optimization, and changes in the memory bandwidth to processor performance.
  • Continuing increase in memory growth – As users move to multi-core processors we expect to see a significant jump in memory configured per CPU. This transition is a result of users attempting to balance memory per core rather than memory per processor.
  • Users rebalancing budgets – The transition to multi-core and the anticipated increases in memory purchase are likely to lead to some rebalancing of system budgets, with users buying fewer processors in order to shift funds to memory purchases. In addition, total core count may be limited by the increased licensing fees associated with ISV applications.



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