As published in Top500

Why does your two-year old smartphone feel like a 1975 Ford Pinto? The answer, of course, is Moore’s Law. Thanks to transistor shrinkage, the semiconductor
components inside the latest handheld devices are twice as powerful as the ones in your now outdated (2013!) relic. Moore’s Law, of course, does
more than drive smartphones sales. It has made the entire computer industry an economic juggernaut for the last 50 years.

Moore’s Law, the doubling the number of transistors (per die area) every two years, means that digital devices can be made significantly cheaper, more
powerful, and more energy-efficient than those made with the previous generation of semiconductor technology. Not only does that encourage quick
replacement cycles for computer equipment, but it also spurs development of new kinds of devices and applications. Without Moore’s Law driving
computer evolution for the last half century, it’s safe to say the Internet and mobile device revolution would never have happened. And supercomputers
would probably never have gotten out of the laboratory.

The troubling news is that it appears we are entering the last years of shrinking transistors, and there is no particular technology on the horizon
to replace it. The smart money says that Moore’s Law will end with the 7nm (2020) or 5nm (2022) process technology nodes. Beyond that, the physics
of the underlying complementary metal oxide (CMOS) technology will make it impractical to shrink transistors much further.

Of course, there may be some heroic effort to shave a few remaining nanometers off of 5nm transistors. New materials such as Germanium and III-V semiconductors,
for example, may be developed in the not-to-distant future to enable useful performance and power improvements, but more exotic technologies like
graphene transistors or optical computing will be needed to overcome the more intractable limitations of semiconductors. These last two technologies,
unfortunately, are unlikely to be ready when Moore’s Law hits the wall in the next five to eight years.

So what’s going to happen?

The answer may lie in a number of technological developments that are already emerging. These developments – new architectures, processor integration,
and 3D chip stacking – are all ways to use transistor real estate more effectively, and are being employed today to improve power and performance
profiles beyond what can be delivered by Moore’s Law alone. Given that, it’s reasonable to expect that once transistor sizes become static, these
strategies will become even more appealing.

In the case of 3D chip stacking, the idea is simple: arrange 2D dies into vertical arrays that can act as a single device. This is already being done
by Micron, Hynix, and other memory makers to build three-dimensional memory devices, which are proving to be significant faster and more efficient
than conventional 2D memory. For example, Micron says its Hybrid Memory Cube (HMC) technology is 15 times faster, uses 70 percent less energy,
and takes up 90 percent less space than two-dimensional DDR3 memory. The first commercial HMC devices are expected to show up in network boxes
and supercomputers this year.

The rationale for building 3D semiconductor devices of all types becomes even more attractive when transistors stop shrinking. And although the 3D
stacking is relatively easy to scale up (literally!), there are yield challenges associated with thru-silicon vias (TSVs), the technology used
to glue multiple layers of semiconductors together. There are also heat dissipation problems for high performance processors when they stacked
vertically. Nevertheless, 3D chips promise to be one of the more straightforward workarounds to Moore’s Law’s demise.

Another creative way to improve the utility of transistors is by integrating more functionality on-chip. Although system-on-a-chip (SoC) designs are
common in mobile devices, and have been for years, SoCs are now making their way into the server market. Server SoCs include such things as I/O
controllers, network adapters, and special-purpose processing blocks (cryptography logic, for example), all of which improves performance and power
thanks to having all the components in close proximity to the processing cores. Silicon photonics is another technology that is likely to be integrated
onto processors in order to speed data transfer capacity and lower power requirements.

By essentially shrinking the motherboard onto the chip, data communication can optimized, increasing overall system performance and energy efficiency.
ARM chip makers, Intel, AMD, and a number of OpenPower vendors are all intent on introducing SoCs into the server market, starting this year.

From a power and performance perspective, there is much to be gained from building optimal SoC configurations for a given application, and when Moore’s
Law ends, there will be an even stronger incentive to build such customized chips. Naturally there is a tension between specialized designs and
the market size to support them. Designing and producing a chip is an expensive endeavor, which explains why proprietary supercomputer processors
yielded to the economics of commodity chips. However, once transistor density becomes static, the calculation is likely to shift in favor of more
customized designs.

Related to processor integration is the expanding array of processor (and memory) architectures we are seeing. Over the past couple of decades, the
prevalence of the x86 and ARM has been unprecedented; ARM has captured the mobile computing world, while x86 has become dominant everywhere else.
Now the vendors behind these two architectures are intent upon invading each other’s domains. With the opening of IBM’s Power platform via its
OpenPower consortium, that company and its partners are looking to develop Power as a viable general-purpose alternative to both x86 and ARM.

Likewise, over the past decade, Nvidia spearheaded the rise of GPUs for general-purpose processing, especially for high performance computing. AMD
is taking a somewhat different approach, splitting its general-purpose GPU aspirations between its discrete FirePro GPU platform and the APU (integrated
GPU-CPU) offerings. Intel has countered with its x86-based Xeon Phi, the non-GPU accelerator that is aimed at much of the same market.

While this reflects only a modest increase in architectural diversity in the server space, the end of Moore’s Law might spark a much broader move to
alternative designs. There may even be a renewed interest in more exotic solutions, like non-Von Neumann architectures (for example, Micron’s Automata
Processor), which promise to circumvent the memory bottleneck of conventional processors.

So the good news is that the end of Moore’s Law won’t be the end of computer innovation – not even close. But OEMs and component makers would do well
to start planning for a post-Moore’s Law world today. Leading vendors like Intel, IBM, and Nvidia will have to defend their turf in a world where
hardware performance power improvement will come almost entirely from improved design and some of the emerging technologies mentioned above. That
levels the playing field for everyone, including startups and small companies nimble enough to embrace the new era of fixed transistor density.
It should make for interesting times.

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